1. Field
This invention relates generally to measuring die temperature during experimental characterization of integrated circuits, and more specifically during factory testing of System-on-Chip (SoC) products.
2. Related Art
The operating characteristics of integrated circuits are commonly temperature dependent. It is generally required to characterize, validate, and/or calibrate a set of product specifications in respect to the die temperature. This requires some procedure to measure die temperature during test with appropriate accuracy.
To perform validation and calibration of products with high-precision temperature-related specifications, a highly-accurate method to measure die temperature is needed. Solutions based on external temperature sensors, such as thermocouples, commonly provide poor measurement accuracy of die temperature, typically worse than ±7° C. This is mainly due to the significant thermal gradient between the measurement point of interest (silicon junction) and the sensor locus (outside package). This error is higher on System-on-Chip (SoC) products with high power dissipation. Solutions based on fully integrated temperature sensors are not sensitive to thermal gradients beyond the silicon interface, but are commonly limited by the complexity of the measurement and signal-conditioning circuitry that may be completely integrated. Another factor that compromises the precision of internal temperature sensors is that their output is commonly accessible through a pad that is subject to leakage effect. Leakage currents will create signal offsets that result in measurement errors. In integrated circuits, the pads are small areas of metal, typically copper or a copper alloy, in predetermined shapes normally used to make a connection to a component pin. The pad leakage is often a limitation to signal measurement precision, especially at high temperatures, turning production-testing at elevated die temperatures a particularly challenging task.